? semiconductor components industries, llc, 2011 october, 2011 ? rev. 5 1 publication order number: NTB5405N/d NTB5405N, nvb5405n power mosfet 40 v, 116 a, single n?channel, d 2 pak features ? low r ds(on) ? high current capability ? low gate charge ? aec?q101 qualified and ppap capable ? nvb5405n ? these devices are pb?free and are rohs compliant applications ? electronic brake systems ? electronic power steering ? bridge circuits maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain?to?source v oltage v dss 40 v gate?to?source v oltage v gs 20 v continuous drain current ? r jc steady state t c = 25 c i d 116 a t c = 100 c 82 power dissipation ? r jc steady state t c = 25 c p d 150 w continuous drain current ? r ja (note 1 ) steady state t a = 25 c i d 16.5 a t a = 100 c i d 11.6 power dissipation ? r ja (note 1) steady state t a = 25 c p d 3.0 w pulsed drain current t p = 10 s i dm 280 a operating junction and storage temperature t j , t stg ?55 to 175 c source current (body diode) pulsed i s 75 a single pulse drain?to source avalanche energy ? (v dd = 50 v, v gs = 10 v, i pk = 40 a, l = 1 mh, r g = 25 ) eas 800 mj lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. thermal resistance ratings parameter symbol max unit junction?to?case (drain) r jc 1.0 c/w junction?to?ambient (note 1) r ja 50 c/w 1. surface mounted on fr4 board using 1 sq in pad size, (cu area 1.127 sq in [2 oz] including traces). http://onsemi.com marking diagram v (br)dss r ds(on) typ i d max (note 1) 40 v 4.9 m @ 10 v 116 a d 2 pak case 418b style 2 n?channel d s g 1 2 3 NTB5405Ng ayww NTB5405N = specific device code g = pb?free device a = assembly location y = year ww = work week 1 device package shipping ? ordering information NTB5405Ng d 2 pak (pb?free) 50 units / rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. NTB5405Nt4g d 2 pak (pb?free) 800 / tape & ree l nvb5405nt4g d 2 pak (pb?free) 800 / tape & ree l
NTB5405N, nvb5405n http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise stated) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 40 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 39 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 40 v t j = 25 c 1.0 a t j = 100 c 10 gate?to?source leakage current i gss v ds = 0 v, v gs = 30 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.5 3.5 v gate threshold temperature coefficient v gs(th) /t j ?7.0 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v, i d = 40 a 4.9 5.8 m v gs = 5.0 v, i d = 15 a 7.0 8.0 forward transconductance g fs v gs = 10 v, i d = 15 a 32 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 32 v 2700 4000 pf output capacitance c oss 700 1400 reverse transfer capacitance c rss 300 600 total gate charge q g(tot) v gs = 10 v, v ds = 32 v, i d = 40 a 88 nc threshold gate charge q g(th) 3.25 gate?to?source charge q gs 9.5 gate?to?drain charge q gd 37 switching characteristics, v gs = 10 v (note 3) turn?on delay time t d(on) v gs = 10 v, v dd = 32 v, i d = 40 a, r g = 2.5 8.5 ns rise time t r 52 turn?off delay time t d(off) 55 fall time t f 70 switching characteristics, v gs = 5 v (note 3) turn?on delay time t d(on) v gs = 5 v, v dd = 20 v, i d = 20 a, r g = 2.5 19 ns rise time t r 153 turn?off delay time t d(off) 32 fall time t f 42 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 20 a t j = 25 c 0.82 1.1 v t j = 100 c tbd reverse recovery time t rr v gs = 0 v, di sd /dt = 100 a/ s, i s = 20 a 66 ns charge time t a 35 discharge time t b 31 reverse recovery charge q rr 113 nc 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
NTB5405N, nvb5405n http://onsemi.com 3 typical performance curves t j = 125 c 0 25 2 v ds , drain?to?source voltage (volts) i d, drain current (amps) 0 figure 1. on?region characteristics 3 25 0 figure 2. transfer characteristics v gs , gate?t o?source voltage (volts) figure 3. on?resistance vs. gate?to?source voltage r ds(on), drain?to?source resistance ( ) i d, drain current (amps) figure 4. on?resistance vs. drain current and gate voltage i d, drain current (amps) ?50 0 ?25 25 2 1 0.8 0.6 50 175 figure 5. on?resistance variation with temperature t j , junction temperature ( c) t j = 25 c t j = ?55 c 75 t j = 25 c i d = 40 a v gs = 10 v r ds(on), drain?to?source resistance (normalized) t j = 25 c r ds(on), drain?to?source resistance ( ) v gs = 10 v figure 6. drain?to?source leakage current vs. voltage 4 v 4.5 v v gs = 5 v v ds 10 v 3.5 v 4 v gs = 6 v to 10 v 50 125 100 5 10 0.008 v gs , gate?t o?source voltage (volts) 0.004 0.005 0.006 0.01 36 0.003 4 0.006 0.002 0.01 0.004 0.003 0.005 610 12 25 11 5 35 45 1.8 50 4 0.007 865 55 175 75 i d = 40 a t j = 25 c 8 5.5 v 7 59 0.009 0.007 0.008 0.009 105 15 75 85 95 1.6 1.4 1.2 150 13 7 59 75 150 125 100 5 v 8 67 0 100 125 200 10 v ds , drain?to?source voltage (volts) v gs = 0 v i dss , leakage (na) t j = 100 c 15 35 4 0 1000 20 100 30 25 10 10000 100000 t j = 175 c
NTB5405N, nvb5405n http://onsemi.com 4 typical performance curves figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage vs. total charge 5 0 v sd , source?to?drain voltage (volts) figure 9. resistive switching time variation vs. gate resistance i s , source current (amps) v gs = 0 v t j = 25 c 25 figure 10. diode forward voltage vs. current 0.8 0.6 20 15 r g , gate resistance (ohms) 1 10 100 10 1 t, time (ns) v ds = 32 v i d = 40 a v gs = 10 v t r t d(on) 1000 t f t d(off) 10 40 v gs , gate-to-source voltage (volts) 0 6 0 q g , total gate charge (nc) 12 8 20 40 60 i d = 40 a t j = 25 c v gs q gs 90 q gd qt 4 2 70 50 0.4 0.7 0.5 v ds , drain-to-source voltage (volts) 18 0 36 24 12 6 v ds v ds = 0 v v gs = 0 v 20 10 10 4000 2000 0 40 gate?to?source or drain?to?source voltage (volts) c, capacitance (pf) t j = 25 c c oss c iss c rss 8000 0 6000 v gs v ds 30 c rss c iss 80 100 0.9 1 3000 1000 7000 5000 10 30 35 30 10 30 figure 11. maximum rated forward biased safe operating area 0 200 400 600 800 25 50 75 100 125 150 17 5 t j , starting junction temperature ( c) avalanche energy (mj) figure 12. maximum avalanche energy vs. starting junction temperature i d = 40 a v ds , drain?to?source voltage (v) i d , drain current (a) 0.1 10 100 1000 0.1 10 100 10 s 100 s 1 ms 10 ms dc v gs = 20 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 1 1 100 300 500 700
NTB5405N, nvb5405n http://onsemi.com 5 typical performance curves figure 13. thermal response t, time ( s) 0.1 1.0 0.01 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse r jc (t) = r(t) r jc d curves apply for power pulse train shown read time at t 1 t j(pk) ? t c = p (pk) r jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 1.0 1 0 0.1 0.01 0.001 0.0001 0.00001 r(t), effective transient thermal resistance (normalized)
NTB5405N, nvb5405n http://onsemi.com 6 package dimensions style 2: pin 1. gate 2. drain 3. source 4. drain seating plane s g d ?t? m 0.13 (0.005) t 23 1 4 3 pl k j h v e c a dim min max min max millimeters inches a 0.340 0.380 8.64 9.65 b 0.380 0.405 9.65 10.29 c 0.160 0.190 4.06 4.83 d 0.020 0.035 0.51 0.89 e 0.045 0.055 1.14 1.40 g 0.100 bsc 2.54 bsc h 0.080 0.110 2.03 2.79 j 0.018 0.025 0.46 0.64 k 0.090 0.110 2.29 2.79 s 0.575 0.625 14.60 15.88 v 0.045 0.055 1.14 1.40 ?b? m b w w notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 418b?01 thru 418b?03 obsolete, new standard 418b?04. f 0.310 0.350 7.87 8.89 l 0.052 0.072 1.32 1.83 m 0.280 0.320 7.11 8.13 n 0.197 ref 5.00 ref p 0.079 ref 2.00 ref r 0.039 ref 0.99 ref m l f m l f m l f variable configuration zone r n p u view w?w view w?w view w?w 123 d 2 pak 3 case 418b?04 issue k *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8.38 5.080 dimensions: millimeters pitch 2x 16.155 1.016 2x 10.49 3.504
NTB5405N, nvb5405n http://onsemi.com 7 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NTB5405N/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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